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Is it possible to program PL in the linux running on PS after linux have booted up?

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17 posts / 0 new
yyliang
Junior(0)
Is it possible to program PL in the linux running on PS after linux have booted up?

Is it possible to program PL in the linux running on PS after linux have booted up?
If yes, please give some idea.

bahne
Junior(0)
Linux program in Ps, programming the PL

Hi yyliang,
I also want to program the PL while the Arm processor is running.I got the information from my FAE to analyze the First Stage Boot Loader.
If there is not such a program available, we will build our own. What is your status here?
Bahne

jeffallred
Junior(0)
I'm able to program it. But

I'm able to program it. But linux crashes each time I do it.

farseer
Junior(0)
I am able to program the PL without crashing linux

Just download the latest Linux build for zed board and use that: http://www.wiki.xilinx.com/Zynq+14.5+-+2013.1+Release

Copy the relevant files on your SD card and it should work, the older version that came packaged apparently had issues.

GMA
Junior(0)
hello,

hello,

same problem with Xillinux on ZedBoard, when i try to read /dev/xdevcfg , the board shutdown and reboot automatically.

i didn't understand, maybe the .bit include some instruction to block this access ?

anny suggestion

bahne
Junior(0)
LAN does not connect to a 100 Mbit Switch

We can boot this on the Zedboard, but unfortunately,
LAN does not connect to a 100 Mbit Switch,
which is a problem as we need LAN to load
additional files to the target at runtime.

Is there a way to change the Zedboard LAN configuration
from 1GBit to 100Mbit, or is this an inherent design
feature (so we need to connect to a 1Gbit capable switch) ?

oskar
Junior(0)
New release tested, PS still dead

Running the 14.5 / 2013.1 release as proposed by farseer works, but unfortunately the PS will hang (or die: no UART, no ethernet) as soon as we load a proper bit file into /dev/xdevcfg

Does the bitfile loaded possibly cause the PS to die, or is PS independent from PL here, so we have to look for bugs in the drivers?

deaxman
Junior(0)
I would love to revive this forum

I am having this problem and can't get around it.

Brogath
Junior(0)
new boot.bin

I have been working on this same problem. I believe the new PL program must have ALL hardware that the kernel expect/has loaded.

But even then it does not seem to work properly.

If it not important to change the PL logic while the PS is running you can also try to make a new boot.bin file using the fsbl, u-boot and your own .bit file.

This is how I currently am able to make new hardware and use Linux to configure it.

oskar
Junior(0)
system with / without PL

The solution, as far as I can observe, is: it makes a difference whether the system initially starts from a BOOT.BIN that does contain PL logic or it starts from a BOOT.BIN that does not contain PL logic. In that first case, PS will always hang/die as soon as /dev/xdevcfg is loaded, in the latter case loading new PL at runtime is no problem. So we will start the system with PS-only BOOT.BIN, then load PL from Linux, then run the application.

Further, we switched to git://github.com/Xilinx/linux-xlnx.git for now, though there is no audio support with it. I'm not sure, whether this helped in solving the /dev/xdevcfg related problems, and we will check the https://github.com/analogdevicesinc/linux/tree/audio_zynq kernel again, as soon as we get back to solve audio access.

Thanks for the help.

chengtms
Junior(0)
PS still hangs after sending new PL file to /dev/xdevcfg

Has anyone seen any success on this so far?

I'm seeing the same problem as most of you guys have mentioned. Linux always hangs after I send a PL bin file to /dev/xdevcfg, yet the new PL config works well. It makes no difference whether there is an initial PL configuration or not when the zynq board boots.

One thing to mention. My PL design is totally isolated from the PS. It does not talk to the PS whatsoever.

I'm using the latest kernel source from the Xilinx github.

Any thoughts?

milosoftware
Junior(0)
If you have drivers in the

If you have drivers in the kernel or otherwise loaded that need things in PL, you get the problems as described.

The fix is to build these drivers as modules, i.e. an "m" in the menuconfig, and load them AFTER programming the PL.

If you want to replace the logic, you can either use partial reconfiguration (vivado) and leave the parts intact that you need, or unload the related modules before replacing the logic.

For an example, use "my" OE zynq layer and it will set things up so that it boots without logic and activates the HDMI and audio components later on, after loading the bistream from the rootfs.

padudle
Junior(0)
cat bitfile.bit.bin > /dev/xdevcfg

The trick with this is to use a properly formatted bitfile. The standard .bit output format is not correct.

You can use the bootgen command with -split option to get that .bit.bin format file. I think the bits are reversed at the byte level or something.

Good luck.

mnewell969
Junior(1)
Trying to use Microzed with wind-river pulsar linux

We are trying to use the microzed board with the windriver pulsar linux and PL.  Is there a good tutorial that can help us with some of the steps i.e. Programming PL after linux boots, Using Pulsar linux on the microzed???

mooney
Junior(1)
Here's one way:

Here's one way:
1. Tell Vivado to produce a .bin file in addition to the .bit file it normally writes when you select "Generate Bitstream".  Do this from the menu "Tools>>Project Settings"; select Bitstream and check -bin-file
2.  Convert the .bin file to bigendian with this program:
#!/bin/env python

# Read the .bin file produced by Vivado, convert to big endian for the MicroZed.

import sys
import struct

def main():
    if len(sys.argv) < 2:
        print "usage: flipBin infile outfile"
        return
    else:
        infile = open(sys.argv[1], 'rb')
        inbuf = infile.read()
        outbuf = ""
        for i in range(0, len(inbuf), 4):
            x = struct.unpack("<i", inbuf[i:i+4])[0]
            outbuf += struct.pack(">i", x)
        outfile = open(sys.argv[2], 'wb')
        outfile.write(outbuf)
        return

if __name__ == "__main__":
    main()

3. Load the PL with this command:
cat <whatever>.bin >/dev/xdevcfg

padudle
Junior(0)
/dev/xdevcfg on linux-xlnx kernel 4.6

Guys, I am running the latest (4.6) kernel from the linux-xlnx github site using the devicetree.dtb that is generated when I build that kernel.  With that setup I get this error.
# cat top.bit.bin > /dev/xdevcfg
cat: write error: Bad address
 
Using an older, 3.14 kernel the exact same top.bit.bin file correctly configures the PL.
I produce the bin file with this command at the end of my compile script
write_cfgmem -disablebitswap -force -format BIN -size 256 -interface SMAPx32 -loadbit "up 0x0 ./results/top.bit" -verbose ./results/top.bit.bin
 
I would like to use the up to date kernel.  I can no longer even build the old kernel on Ubuntu 16.04.  Any suggestions would be greatly appreciated.
 

zedhed
Moderator(29)
/dev/xdevcfg on linux-xlnx kernel 4.6

Hi padudle,

Is this your post here on the Xilinx forums?

https://forums.xilinx.com/t5/Embedded-Linux/dev-xdevcfg-on-Linux-kernel-...

It looks like the latest xilinx_devcfg driver can handle non byte reversed bitstreams.

https://github.com/Xilinx/linux-xlnx/blob/50d2141e18b97baab8f121782f9884...

Perhaps there is something going wrong with the bitstream during your write_cfgmem step to swap the endianness? Have you already tried to load a non byte reversed bitstream under 4.6 kernel?

Regards,

-Kevin