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Differences between ZedBoard and Xilinx Zynq-7000 SoC ZC702 Evaluation Kit

Hello everybody!

What are the main differences between these two development board? ZedBoard costs 395$, while the Evaluation Kit by Xilinx costs 895$ and I can't understand this evident difference.

Thank you.



 

Xilinx ZC702

Avnet/Digilent ZedBoard

Price

$895

$395

Xilinx Part        XC7Z020-1CLG484C(ES)

Configuration
   1) Onboard configuration circuitry
   2) Quad SPI Flash
   3) SD Card
   4) JTAG Connector

SMT2
128Mb
8 GB

SMT2
256Mb
4 GB

Memory 

    1) RAM
    2) Quad SPI Flash
    3) IIC EEPROM

DDR3, 1GB, 533MHz
128Mb
1KB

DDR3, 512MB, 533MHz
256Mb
X

Communication
    1) Ethernet
    2) USB 2.0 OTG Port
    3) Serial Port (UART2USB)
    4) CAN

 10/100/1000
√ (SMSC PHY)
√ (SiLabs)

 10/100/1000
√  (TI PHY)
√ (Cypress)
X

Expansion Ports
    1) FMC
    2) PMOD Header
    3) AMS Expansion

2x LPC
12 PL I/Os

1x LPC
8 PS I/Os, 32 PL I/Os

User I/O
    1) LEDS
    2) Switches
    3) PBs

2 PL
3 PL
2 PL

1 PS, 8 PL
8 PL
2 PS, 5 PL

Display and Audio

    1) HDMI
    2) VGA
    3) OLED
    4) Audio Codec

ADV7511
X
X
X

ADV7511
12-bit color (R-divider)
128x32
ADAU1761

Power

    1) Wall adapter
    2) Separate PS/PL rails
    3) Power Monitor

12V @ 5A

All Rails via TI SW

12V @ 5A
 X
12V only

 

First of all, thank you for this table. I have another question. What kind of Operating Systems can be installed on the ZedBoard? Are they the same that can run on the Xilinx Zynq board?

Than you!

Matteo

TimDuffy's picture

sticken,

The Zynq-7000 device that is on the Zedboard and the one found on the ZC702 are identical - thus any OS that can run on one, can run on the other. It is all a mater of BSP and Driver availability.

Some of the Xilinx materials say "1Gb" DDR3. I believe that this should be 1GB ( http://www.micron.com/parts/dram/ddr3-sdram/mt41j256m8hx-15e )

Also, the ZC702 comes with a locked seat of "Embedded Edition of the ISE Design Suite" which may be useful.

Anyone know if that can be used with the ZedBoard?

Greg

The ZC702 has 4 components of 2Gb each, which is a total system memory of 1GB.  Any ZC702 documentation referring to its memory capacity as 1Gb is wrong.
 
Since the ZC702 and ZedBoard share the same Zynq device (7z020), the 7z020-device-locked software will work with ZedBoard.  I believe the Embedded Edition (compared to the ZedBoard included WebPACK/ChipScope) only adds full ISIM capability.
 
Bryan

Thank you for your answers. I saw the differences between the different ISE licensens but I don't know what's the meaning of some tools. For example what is ChipScope Pro and the others that are sold with the Embedded Edition and not sold with the WebPack Edition? Moreover the Software Development Kit is available for the WebPack licence here: http://www.xilinx.com/products/design-tools/ise-design-suite/embedded-ed..., while is not available here: http://www.origin.xilinx.com/products/design-tools/ise-design-suite/inde....

Another thing: with vivado can I write C code for the arm A9? I don't want to write C code and translate it in vhdl. I just want to perform some computation on the A9 processor and other computation using the fpga.

TimDuffy, what do you mean whit "It is all a mater of BSP". I don't know what BSP does mean.

Thank you.

Chipscope is essentially a logic analyzer inside the chip. And a node locked version does come with the Zedboard.

Microblaze is a soft-processor that you can implement on Xilinx FPGAs. Not sure what the "Microblaze Microcontroller System" in the webpack is, but I'm guessing a watered down version of the soft processor. Not really needed on the Zinq since it has the ARM processors.

So it looks like the only thing you really get with the embedded edition is the unlimited iSim (simulator). I have never used iSim so I can't comment on it.

Note that I do not own the zedboard yet. But at my work we use the full suite of ISE 14.2 tools.

As far as the SDK - it didn't used to be available with the Webpack, but now a version that supports the ARM processor is. I suspect that the second chart hasn't been updated appropriately yet.

In my limited understanding it is the low level code that configures the hardware peripherals.